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Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license is included in the section entitled "GNU Free Documentation License".

This document is provided as-is with no warranty, implied or otherwise. There have been attempts to eliminate errors from this document, but there is no doubt that errors remain. As a result, the author does not assume any responsibility for errors and omissions, or damages resulting from the use of the information provided.

Additional materials and updates for this work will be available at http://clay-more.engineer.gvsu.edu/~jackh/books.html

page i
1.1 TODO LIST 1.4
2. PROGRAMMABLELOGIC CONTROLLERS ...... ...... . 2.1
2.1 INTRODUCTION 2.1
2.1.1 Ladder Logic 2.1.2 Programming 2.1.3 PLC Connections 2.1 2.6 2.10
2.1.4 Ladder Logic Inputs 2.1.5 Ladder Logic Outputs 2.2 A CASE STUDY 2.11 2.12 2.13
2.3 SUMMARY 2.14
2.4 PRACTICE PROBLEMS 2.15
2.5 PRACTICE PROBLEM SOLUTIONS 2.15
2.6 ASSIGNMENT PROBLEMS 2.16

1. PLC HARDWARE . . ....... ....... ...... ....... ...... . 3.1
1. LOGICAL SENSORS .......

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