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Figure 18.4 IL Equivalents for Ladder Logic

Figure 18.5 shows the IL programs that are generated when there are multiple out puts. This often requires that the stack be used to preserve values that would be lost nor

plc il -18.6

mally using the MPS, MPP and MRD functions. The MPS instruction will store the current value of the top of the stack. Consider the first example with two outputs, the value of A is loaded on the stack with LD A. The instruction ST X examines the top of the stack, but does not remove the value, so it is still available for ST Y. In the third example the value of the top of the stack would not be correct when the second output rung was examined. So, when the output branch occurs the value at the top of the stack is copied using MPS,and pushed on the top of the stack. The copy is then ANDed with B andusedto set X.After this the value at the top is pulled off with the MPP instruction, leaving the value at the top what is was before the first output rung. The last example shows multiple output rungs. Before the first rung the value is copied on the stack using MPS. Before the last rung the value at the top of the stack is discarded with the MPP instruction. But, the two center instructions use MRD to copy the right value to the top of the stack -it could be replaced with MPP then MPS.

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Ladder

Instruction List (IL)

AX LD A ST X Y

ST Y

LD A LD A ST X ST X Y

LD B AND B ANB ST Y ST Y

LD A LD A MPS MPS Y

LD B AND B ANB ST X ST X MPP MPP AND C LD C ST Y ANB ST Y

LD A LD A MPS MPS X

LD B AND B ANB ST W Y

ST W MRD MRD AND C Z